This invention relates generally to the design of electronic circuits, and more particularly to analog-to-digital converters.
Analog-to-digital converters (ADCs) are widely used to process electrical signals in many electronic applications. An integrated circuit ADC typically accepts an analog voltage signal and converts the signal into a digital form as the output. ADCs for high speed and high resolution applications, for example, having a speed greater than 10 MHz and a resolution of greater than 10b are not straightforward to design because of the conflicting requirements of high precision and high speed. High precision in general requires accurate high-gain closed-loop circuits with long settling times and averaging characteristics to remove noise-based factors from the circuit output and ensure settling to precise values, which conflicts with the high speed requirement. High speed circuits are best implemented as simple low-gain open-loop designs, but such designs are inaccurate and do not meet the precision requirements.
Various techniques such as calibration, trimming, and dynamic element matching, have been used for years in the prior art to correct for the imperfections of the analog circuit in the ADC. These techniques have different spheres of application. Techniques tied to the real/virtual modification of component values, such as trimming and dynamic element matching, are suitable for removing nonlinearities associated with component mismatch. For example, trimming or dynamic element matching are commonly applied to remove the mismatch between capacitor values in switched-capacitor pipelined ADC architectures. Techniques such as digital calibration are more general in nature and can be applied to remove the effects of such mismatch but also to detect other sources of nonlinearities in the system. For example, digital calibration of switched-capacitor pipelined ADCs may be used to remove the effects of both component mismatch as well as gain error in the stages, as described further by Lee and Song in the IEEE Journal of Solid-State Circuits, December 1992 in an article entitled xe2x80x9cDigital-Domain Calibration of Multistep Analog-to-Digital Convertersxe2x80x9d.
While some techniques and circuits of the prior art solve the problem for specific circuit architectures, there exists a need for a more general calibration solution applicable to ADCs in a wide variety of architectures.
The present invention provides an ADC that is robust enough to allow the use of analog circuits in the ADC with accuracy falling far short of the nominal required precision of the ADC, with the remaining accuracy made up for by the calibration circuit. The present invention achieves technical advantages as a practical circuit architecture for the design of high accuracy analog-to-digital converters using analog circuits whose intrinsic accuracy is augmented using digital calibration, using common circuit building blocks and methodologies in integrated circuit form. The ADC circuit transfer function is nonlinear, has a unique mapping, and may have multiple transfer function segments with varying slopes. The transfer function unique mapping is achieved by altering the ADC circuit transfer function, preferably by increasing the slope of the ADC transfer function.
Disclosed is an ADC having an ADC circuit adapted to produce a digital output signal for a plurality of analog input signals, where the ADC circuit has a nonlinear transfer function.
Further disclosed is an ADC including an ADC circuit adapted to produce a digital output signal for a plurality of analog input signals. The ADC circuit has a nonlinear transfer function. A transfer function modifying circuit is coupled to the ADC circuit, the transfer function modifying circuit being adapted to modify the ADC circuit transfer function to have a unique mapping.
Also disclosed is a method of designing an ADC including the step of designing an ADC circuit having a nonlinear transfer function with a unique mapping.
Further disclosed is a method of calibrating an ADC including the step of modifying an ADC circuit to have a nonlinear transfer function with different digital output signals for a plurality of analog input signals, with each digital output signal being different from every other digital output signal. The calibration method also includes the step of calibrating the modified ADC over the plurality of analog input signals.
Advantages of the invention include an ADC having analog circuits that exhibits considerably higher resolutions than existing designs. ADCs with accuracy specifications similar to existing ADCs may be designed that have simpler analog circuits which are easier to design, faster and consume less power. The ADC may be considered as one xe2x80x9cblack boxxe2x80x9d and be calibrated on an. end-to-end basis. The only requirement imposed is the unique mapping condition for the transfer function. There is no need to calibrate individual components as in the prior art, which saves IC real estate and design time. The present invention may be applied to imprecise but fast-settling circuits to create circuits which are effectively both precise and fast. The invention may be used to produce less fast/accurate ADC designs with lower power/size analog circuits.